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| [AKD4426-SA] a kd4426-s a ak4426 evaluation board rev.2 general description AKD4426-SA is an evaluation board for ak4426 (192khz sampling 24bit stereo ?dac with 2vrms output). AKD4426-SA has a digital audio interface ( ak4118) of optical input and can easily achieve the interface with digital audio syste m. therefore, it is easy to evaluate the sound quality of ak4426. ? ordering guide AKD4426-SA ---- ak4426 evaluation board function ? on-board digital audio interface. (ak4118) +15v lout ctrl ak4426 ak4118 (dir) opt in 10pin header regulator rout bnc in avdd dsp 5v 3.3v vdd gnd figure 1. AKD4426-SA block diagram (* circuit diagram are attached at the end of this manual.) [AKD4426-SA] board outline chart ? outline chart - 0 6 5 74lvc541a bottom 3 0 6 5 j2 u3 j1 1 2 9 10 1 0 3 5 j3 4 h l 4 8 4 8 h l h l u1 ak4426 6 ak4118 bottom 1 2 9 10 1 0 3 5 7 5 5 " 7 % % 7 % % ( / % torx 141 $ 0 " 9 ak4118-pdn smute port2 dsp ctrl 1 $ ) ' njm78m05fa figure 2. AKD4426-SA outline chart ? comment (1) lout, rout (bnc-jack) it is analog signal output jack. the signal is output from lout/rout pins. (2) coax, port1, port 2 (digital signal connector) coax (bnc-jack): digital signal (spdif, fs: 8 ? 192khz) is input to the ak4118. (default) port1 (10 pin header): the clock and data can be input and output with this connector. port2 (optical connecter): optical digital signal (spdif, fs: 32 ? 108khz) is input to the ak4118. (3) port3 (10 pin header) control port. connect the bundl ed cable into this port. (4) +15v, vdd, gnd, avdd these are the power supply connectors. connect power supply with these pins. as for the detail comments, refer to the setup of power supply on the next page. (5) sw1, sw2, s1 (switch) sw1: this switch is not used on the AKD4426-SA. sw2: reset of ak4118. keep ?h? during normal operation. s1: setting of audio serial interface format and fr equency of mcko that is output from ak4118. [AKD4426-SA] ? operation sequence 1) set up the power supply lines. each supply line should be distributed from the power supply unit. name of jack color of jack voltage range using default se tting default +15v red +7 +20v regulator : vdd and avdd for ak4426. the power supply for ak4118, 74lvc541 and other logic circuit. should be connected. +15v vdd orange +4.5 +5.5v vdd of ak4426 should be connected. (default, note1) +5v avdd orange +4.5 +5.5v avdd of ak4426 should be connected. (default, note2) +5v gnd black 0v ground should be connected. 0v table 1.set up of power supply lines note 1 ) vdd for ak4426 can supply to connect regulator. in this case, should be to ?short? of r58 and no connected ?vdd? of jack. note 2 ) a vdd for ak4426 can supply to connect regulator. in this case, should be to ?short? of r59 and no connected ?avdd? of jack. 2) dip switch setting: refer to table 2, table 3 and table 4. 3) power down: the ak4118 should be reset once by bringing sw2 (ak4118 pdn) ?l? upon power-up. ? evaluation mode 1. using dir (coax) (default) the dir generates mclk, bick, lrck and sdata from th e received data through bn c connector (j3). it is possible to evaluate the ak4426 by using cd disk. should be no connected to port1 (dsp). setting: r41: short (0 ? ) ; r42: open ? coax is recommended for an evaluation of the sound quality. 2. using dir (optical link) the dir generates mclk, bick, lrck and sdata from the received data through optical connector (port2: torx141). it is possible to evaluate the ak4426 by using cd disk. should be no connected to port1 (dsp). setting: r41: open ; r42: short (0 ? ) 3. supply all interface signals th at includ master clock via po rt1 from external equipments.. setting: r43, r44, r45, r46: open r47, r48, r49, r50: short (0 ? ) note) the above work of removing (open) or shorting resistors need to modify the connection by soldering. [AKD4426-SA] ? setting of dip switch [s1]: ak4118 setting (on = ?h?, off = ?l?) no. pin off on default 1 dif1 l 2 dif0 ak4118?s audio data format setting refer to table 3 l 3 ocks1 h 4 ocks0 ak4118 ? s master clock setting refer to table 4 l table 2. s1 setting mode dif2 duf1 dif0 sdto 4 l l 24bit, left justified 5 h l h 24bit, i 2 s default table 3. audio data format setting ocks1 ocks0 mcko1 fs (max.) l l 256fs 96khz h l 512fs 48khz h h 128fs 192khz default table 4. mcko clock setting ? setting of sw1 and sw2 switch [sw1](smute): don?t use. sw1 must be always ?l?. [sw2](pdn): reset of ak4118. keep ?h? during normal operation. ? serial control (i 2 c-bus control mode) the ak4426 can be controlled via the printer port (par allel port) of ibm-at compatible pc. connect port1 (ctrl) with pc by 10 wire flat cable packed w ith the AKD4426-SA $ p o o f d u cdto/sda(ack) cclk/scl cdti/sda 10pin header 10pin connector 10 wire flat cable pc AKD4426-SA 2 ? 10 9 port3 ctrl 3 f e csn figure 3. connect of 10 wire flat cable [AKD4426-SA] ? analog output circuit aoutl and aoutr pins are outputted from j1 (lout) and j2 (rout). r1 (open) r2 (open) c27 1n + c24 (short) c29 1n + c28 (short) r21 (short) r16 470 j1 bnc-r-pc 1 2 3 4 5 j2 bnc-r-pc 1 2 3 4 5 r20 470 r18 (open) rout lout r22 (open) r17 (short) aoutl aoutr figure 4. aoutl / aoutr output circuit ? akm assumes no responsibility for the troubl e when using the above circuit examples. [AKD4426-SA] control soft manual evaluation board and control soft settings 1. set an evaluation board properly. 2. connect the evaluation board to an ibm pc/at compatible pc by a 10wire flat cable. be aware of the direction of the 10pin header. when running this control soft on the wi ndows 2000/xp, the driver which is included in the cd must be installed. refer to the ?driver control inst all manual for akm device control software? for installing the driver. when running this control soft on the wind ows 95/98/me, driver installing is not necessary. this control soft does not support the windows nt. 3. proceed evaluation by followi ng the process below. operation screen 1. start up the control program following the process above. the operation screen is shown below. figure 5. window of [ function] [AKD4426-SA] operation overview function, register map and testing tool can be controlled by this control soft. these controls are selected by upper tabs. buttons which are frequently used such as register initia lizing button ?write default?, are located outside of the switching tab window. refer to the ? dialog boxes? for details of each dialog box setting. 1. [port reset]: for when connecting to usb i/f board (akdusbif-a) click this button after the control soft starts up when connecting usb i/f board (akdusbif-a). 2. [write default]: register initializing when the device is reset by a hardware reset, use this button to initialize the registers. 3. [all write]: executing write commands for all registers displayed. 4. [save]: saving current register settings to a file. 5. [load]: executing data write from a saved file. 6. [data r/w]: ?data r/w? dialog box is popped up. figure 6. window of [ data r/w ] [AKD4426-SA] 2. [reg]: register map this tab is for a register writing and reading. each bit on the register map is a push-button switch. button down indicates ?h? or ?1? and the bit name is in red (when read only it is in deep red). button up indicates ?l? or ?0? and the bit name is in blue (when read only it is in gray) grayout registers are read only regist ers. they can not be controlled. the registers which is not defined in the datasheet are indicated as ?---?. figure 7. window of [ reg] [AKD4426-SA] [write]: data writing dialog it is for when changing two or more bits on the same address at the same time. click [write] button located on the right of the eac h corresponded address fo r a pop-up dialog box. when checking the checkbox, the register will be ?h? or ?1?, when not checking the re gister will be ?l? or ?0?. click [ok] to write setting value to the registers, or click [cancel] to cancel this setting. figure 8. window of [ register set ] [AKD4426-SA] 3. [tool]: testing tools this tab screen is for evaluation testing tool. click buttons for each testing tool. figure 9. window of [ tool] [AKD4426-SA] dialog boxes 1. [all req write]: all req write dialog box click [all reg write] button in the main wi ndow to open register setting files. register setting files saved by [save] button can be applied. figure 10. window of [ repeat test] [AKD4426-SA] 2. [data r/w]: data r/w dialog box click the [data r/w] button in the main wi ndow for data read/write dialog box. data write is available to specified address. figure 11. window of [ loop] address box: input data address in hexadecimal numbers for data writing. data box: input data in hexadecimal numbers. mask box: input mask data in hexadecimal numbers. this is ?and? processed input data. [write]: writing to the addres s specified by ?address? box. [read]: reading from the addre ss specified by ?address? box. the result will be shown in the read data box in hexadecimal numbers. [close]: closing the dialog box and finish the process. data writing can be cancelled by this button instead of [write] button. *the register map will be updated after executing [write] or [read] commands. [AKD4426-SA] measurement results [measurement condition] ? measurement unit : audio prec ision system two cascade (ap2) ? mclk : 512fs (fs = 44.1khz), 256fs (fs = 96khz), 128fs (fs = 192khz) ? bick : 64fs ? fs : 44.1khz, 96khz, 192khz ? bit : 24bit ? power supply : vdd=avdd=5v ? interface : dir ? temperature : room table data fs=44.1khz parameter input sign al filter condition lch rch unit s/(n+d) 1khz, 0db 20klpf 91.8 91.6 db dr 1khz, -60db 20khz spcl, a-weighted 106.0 106.1 db s/n ?0? data 20khz spcl, a-weighted 106.3 106.4 db fs=96khz parameter input sign al filter condition lch rch unit s/(n+d) 1khz, 0db 40klpf 91.0 90.8 db dr 1khz, -60db 40khz spcl, a-weighted 106.0 106.1 db s/n ?0? data 40khz spcl, a-weighted 106.3 106.4 db fs=192khz parameter input sign al filter condition lch rch unit s/(n+d) 1khz, 0db 40klpf 91.6 91.4 db dr 1khz, -60db 40khz spcl, a-weighted 106.1 106.2 db s/n ?0? data 40khz spcl, a-weighted 106.2 106.3 db [AKD4426-SA] plot data (1) fs = 44.1khz (mclk=512fs) 20 20k 50 100 200 500 1k 2k 5k 10k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a figure 12 . fft (fin=1khz, input level=0dbfs) 20 20k 50 100 200 500 1k 2k 5k 10k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a figure 13. fft (fin=1khz, input level=-60dbfs) [AKD4426-SA] 20 20k 50 100 200 500 1k 2k 5k 10k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a figure 14. fft (noise floor) 20 100k 50 100 200 500 1k 2k 5k 10k 20k 50k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a figure 15. fft (out of band noise) [AKD4426-SA] -140 +0 -120 -100 -80 -60 -40 -20 dbfs -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b r a figure 16. thd+n vs. input level (fin=1khz, 20khz spcl) 20 20k 50 100 200 500 1k 2k 5k 10k hz -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b r a figure 17. thd+n vs. input frequenc y (input level=0dbfs, 20khz spcl) [AKD4426-SA] -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbfs -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a figure 18. linearity (fin=1khz) 2.5k 20k 5k 7.5k 10k 12.5k 15k 17.5k hz -1 +1 -0.8 -0.6 -0.4 -0.2 +0 +0.2 +0.4 +0.6 +0.8 d b r a figure 19. frequency response (input level=0dbfs) [AKD4426-SA] 20 20k 50 100 200 500 1k 2k 5k 10k hz -140 -80 -135 -130 -125 -120 -115 -110 -105 -100 -95 -90 -85 d b figure 20. crosstalk (input level=0dbfs) red: lch ? rch, blue: rch ? lch [AKD4426-SA] (2) fs = 96khz (mclk=256fs) 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a figure 21. fft (fin=1khz, input level=0dbfs) 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a figure 22. fft (fin=1khz, input level=-60dbfs) [AKD4426-SA] 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a figure 23. fft (noise floor) 20 100k 50 100 200 500 1k 2k 5k 10k 20k 50k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a figure 24. fft (out of band noise) [AKD4426-SA] -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbfs -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b r a figure 25. thd+n vs. input level (fin=1khz, 40khz spcl) 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b r a figure 26. thd+n vs. input fr equency (input level=0dbfs) [AKD4426-SA] -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbfs -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a figure 27 linearity (fin=1khz) 5k 40k 10k 15k 20k 25k 30k 35k hz -1 +1 -0.8 -0.6 -0.4 -0.2 +0 +0.2 +0.4 +0.6 +0.8 d b r a figure 28. frequency response (input level=0dbfs) [AKD4426-SA] 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -140 -80 -135 -130 -125 -120 -115 -110 -105 -100 -95 -90 -85 d b figure 29. crosstalk (input level=0dbfs) red: lch ? rch, blue: rch ? lch [AKD4426-SA] (3) fs = 192khz (mclk=128fs) 20 80k 50 100 200 500 1k 2k 5k 10k 20k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a figure 30. fft (fin=1khz, input level=0dbfs) 20 80k 50 100 200 500 1k 2k 5k 10k 20k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a figure 31. fft (fin=1khz, input level=-60dbfs) [AKD4426-SA] 20 80k 50 100 200 500 1k 2k 5k 10k 20k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a figure 32. fft (noise floor) 20 100k 50 100 200 500 1k 2k 5k 10k 20k 50k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a figure 33. fft (out of band noise) [AKD4426-SA] -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbfs -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b r a figure 34. thd+n vs. input level (fin=1khz, 40khz spcl) 20 80k 50 100 200 500 1k 2k 5k 10k 20k hz -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b r a figure 35. thd+n vs. input fr equency (input level=0dbfs) [AKD4426-SA] -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbfs -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a figure 36. linearity (fin=1khz) 10k 80k 20k 30k 40k 50k 60k 70k hz -2 +1 -1.75 -1.5 -1.25 -1 -0.75 -0.5 -0.25 +0 +0.25 +0.5 +0.75 d b r a figure 37. frequency response (input level=0dbfs) [AKD4426-SA] 20 80k 50 100 200 500 1k 2k 5k 10k 20k hz -140 -80 -135 -130 -125 -120 -115 -110 -105 -100 -95 -90 -85 d b figure 38. crosstalk (input level=0dbfs) red: lch ? rch, blue: rch ? lch [AKD4426-SA] revision history date manual revision board revision reason page (yy/mm/dd) contents 2008/12/25 km098500 0 first edition 2009/09/10 km098501 1 device rev. changed ak4426: rev.b rev.d ak4426: rev.d rev.e 2010/02/19 km098502 2 device rev. changed p13 ? p28 important notice z these products and their specifications ar e subject to change without notice. when you consider any use or application of these products , please make inquiries the sales office of asahi kasei microdevices corporation (akm) or authorized distributors as to current status of the products. z akm assumes no liability for infringement of any patent, intellect ual property, or other rights in the application or use of any information contained herein. z any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of expor t pertaining to customs and tariffs, currency exchange, or strategic materials. z akm products are neither intended nor au thorized for use as critical components note1) in any safety, life support, or other hazard related device or system note2) , and akm assumes no responsibility for such use, except for the use approved with the express written consent by representative director of akm. as used here: note1) a critical component is one whose failure to func tion or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. note2) a hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or othe r fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. z it is the responsibility of the buyer or distributor of akm pr oducts, who distributes, dispos es of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold akm harmless from any and all claims arising from the use of said product in the absence of such notification. measurement results updated 5 5 4 4 3 3 2 2 1 1 d d c c b b a a 442x-avdd 442x-vdd 442x-mclk 442x-bick 442x-sdata 442x-lrck 442x-csn/cad0/smute 442x-cclk/scl 442x-cdti/sda aoutl aoutr d5v title size document number rev date: sheet of ak4426 0 AKD4426-SA a4 14 tuesday, december 16, 2008 title size document number rev date: sheet of ak4426 0 AKD4426-SA a4 14 tuesday, december 16, 2008 title size document number rev date: sheet of ak4426 0 AKD4426-SA a4 14 tuesday, december 16, 2008 manual on auto off 4425/6 4425/6 r56 (open) r56 (open) r33(short) r33(short) r60 (open) r60 (open) r34(open) r34(open) + c6 10u + c6 10u r37(open) r37(open) ak4426 u1 ak4426 u1 vdd 1 mclk 2 bick 3 sdti 4 lrck 5 csn 6 cclk 7 cdti 8 aoutr 9 avdd 10 vss2 11 aoutl 12 vee 13 cn 14 cp 15 vss1 16 c4 1u c4 1u r55 (open) r55 (open) c5 0.1u c5 0.1u r36(short) r36(short) r54 (open) r54 (open) c1 0.1u c1 0.1u r57 (open) r57 (open) + c2 10u + c2 10u r35(open) r35(open) r53(short) r53(short) r38(open) r38(open) c3 1u c3 1u 5 5 4 4 3 3 2 2 1 1 d d c c b b a a d3.3v d3.3v 442x-mclk 442x-bick 442x-sdata 442x-lrck 442x-csn/cad0/smute 442x-cclk/scl cclk/scl csn/cad0 lvc d3.3v dif0 4118-vcc dif1 ocks0 ocks1 dif0 ocks0 ocks1 4118-vcc rx-out 4118-vcc d5v d3.3v 4118-vcc dif1 title size document number rev date: sheet of clock & dir 0 AKD4426-SA a3 24 tuesday, december 16, 2008 title size document number rev date: sheet of clock & dir 0 AKD4426-SA a3 24 tuesday, december 16, 2008 title size document number rev date: sheet of clock & dir 0 AKD4426-SA a3 24 tuesday, december 16, 2008 ak4118-pdn h l mclk bick sdata lrck csn cclk/scl dsp mclk bick sdata lrck smute h l csn/cad0 smute hl dif0 dif1 ocks0 ocks1 ak4118-int0 ak4118-int1 r50(open) r50(open) + c7 10u + c7 10u port1 a1-10pa-2.54dsa port1 a1-10pa-2.54dsa 10 8 6 4 2 1 3 5 7 9 r12 10k r12 10k r48(open) r48(open) r47(open) r47(open) r46(short) r46(short) c21 0.1u c21 0.1u u4 74hc14 u4 74hc14 gnd 7 1a 1 3a 5 5a 11 5y 10 3y 6 1y 2 2y 4 4y 8 6y 12 6a 13 4a 9 2a 3 vcc 14 c14 0.1u c14 0.1u r51(short) r51(short) + c11 10u + c11 10u r10 51 r10 51 c16 (open) c16 (open) r11 (open) r11 (open) r8 51 r8 51 r14 10k r14 10k u3 ak4118 u3 ak4118 ips0/rx4 1 nc 2 dif0/rx5 3 test2 4 dif1/rx6 5 vss1 6 dif2/rx7 7 ips1/iic 8 p/sn 9 xtl0 10 xtl1 11 tvdd 13 nc/gp1 14 tx0/gp2 15 tx1/gp3 16 bout/gp4 17 cout/gp5 18 uout/gp6 19 vout/gp7 20 dvdd 21 vss2 22 mcko1 23 bick 26 mcko2 27 daux 28 xto 29 xti 30 pdn 31 cm0/cdto/cad1 32 cm1/cdti/sda 33 ocks1/cclk/scl 34 ocks0/csn/cad0 35 int0 36 avdd 38 r 39 vcom 40 vss3 41 rx0 42 nc 43 rx1 44 test1 45 rx2 46 vss4 47 rx3 48 vin/gp0 12 lrck 24 sdto 25 int1 37 r43(short) r43(short) c12 0.1u c12 0.1u test2 test2 test1 test1 r13 (open) r13 (open) rp1 47k rp1 47k 4 3 2 1 c15 (open) c15 (open) r45(short) r45(short) r61 (open) r61 (open) r49(open) r49(open) r6 51 r6 51 + c13 10u + c13 10u c22 0.1u c22 0.1u r4 51 r4 51 d2 hsu119 d2 hsu119 k a r62 (open) r62 (open) u2 74lvc541a u2 74lvc541a a1 2 a2 3 a3 4 a4 5 a5 6 a6 7 a7 8 a8 9 g1 1 g2 19 y1 18 y2 17 y3 16 y4 15 y5 14 y6 13 y7 12 y8 11 vcc 20 gnd 10 s1 sw dip-4 s1 sw dip-4 4 3 2 1 5 6 7 8 r5 51 r5 51 + c9 10u + c9 10u r3 5.1 r3 5.1 sw2 ate1d-2m3 sw2 ate1d-2m3 2 1 3 r9 10k r9 10k r52(open) r52(open) c23 0.1u c23 0.1u c10 0.1u c10 0.1u d1 hsu119 d1 hsu119 k a c8 0.1u c8 0.1u r44(short) r44(short) sw1 ate1d-2m3 sw1 ate1d-2m3 2 1 3 5 5 4 4 3 3 2 2 1 1 d d c c b b a a d3.3v rx-out aoutl aoutr 442x-cdti/sda csn/cad0 cclk/scl d5v d3.3v d5v d5v d5v title size document number rev date: sheet of input, output 0 AKD4426-SA a4 34 friday, december 26, 2008 title size document number rev date: sheet of input, output 0 AKD4426-SA a4 34 friday, december 26, 2008 title size document number rev date: sheet of input, output 0 AKD4426-SA a4 34 friday, december 26, 2008 coax opt bnc lout rout cclk/scl cdto/sda(ack) cdti/sda csn rx + c26 10u + c26 10u r2 (open) r2 (open) u6 74ls07 u6 74ls07 1a 1 1y 2 vcc 14 gnd 7 2a 3 3a 5 4a 9 5a 11 6a 13 2y 4 3y 6 4y 8 5y 10 6y 12 c25 0.1u c25 0.1u r30 1.8k r30 1.8k r25 470 r25 470 r26 10k r26 10k c27 1n c27 1n r42(open) r42(open) r23 75 r23 75 r18 (open) r18 (open) port3 ctrl port3 ctrl 10 8 6 4 2 1 3 5 7 9 r41(short) r41(short) j2 bnc-r-pc j2 bnc-r-pc 1 2 3 4 5 r28 10k r28 10k r16 470 r16 470 + c24 (short) + c24 (short) c30 0.1u c30 0.1u r17 (short) r17 (short) + c28 (short) + c28 (short) r29 470 r29 470 r24 10k r24 10k r19 51 r19 51 r39 (short) r39 (short) c31 0.1u c31 0.1u c32 0.1u c32 0.1u port2 torx141 port2 torx141 out 1 vcc 3 gnd 2 j3 bnc-r-pc j3 bnc-r-pc 1 2 3 4 5 r1 (open) r1 (open) r20 470 r20 470 r22 (open) r22 (open) c29 1n c29 1n r21 (short) r21 (short) r27 470 r27 470 u5 74hct157_vcc_gnd_visible2 u5 74hct157_vcc_gnd_visible2 1a 2 1y 4 1b 3 2a 5 2y 7 2b 6 3a 11 3y 9 3b 10 4a 14 4y 12 4b 13 a/b 1 g 15 vcc 16 gnd 8 l1 47u l1 47u 1 2 j1 bnc-r-pc j1 bnc-r-pc 1 2 3 4 5 5 5 4 4 3 3 2 2 1 1 d d c c b b a a +15v-in +15v-in vdd-in avdd-in vdd-in avdd-in 442x-avdd 442x-vdd d3.3v lvc d5v title size document number rev date: sheet of power supply 0 AKD4426-SA a4 44 tuesday, december 16, 2008 title size document number rev date: sheet of power supply 0 AKD4426-SA a4 44 tuesday, december 16, 2008 title size document number rev date: sheet of power supply 0 AKD4426-SA a4 44 tuesday, december 16, 2008 +15v-->+5v +15v +5v +15v +15v-->+3.3v +3.3v +3.3v +5v avdd t45_o avdd t45_o 1 t1 upc3533hf t1 upc3533hf out 3 gnd 2 in 1 + c42 47u + c42 47u 1 2 + c38 470u + c38 470u 1 2 t2 njm78m05fa t2 njm78m05fa out 3 gnd 2 in 1 c39 0.1u c39 0.1u c35 0.1u c35 0.1u + c37 47u + c37 47u r31 (short) r31 (short) gnd t45_black gnd t45_black 1 r58(open) r58(open) c40 0.1u c40 0.1u vdd t45_o vdd t45_o 1 c36 0.1u c36 0.1u + c34 470u + c34 470u r32 (open) r32 (open) + c41 47u + c41 47u 1 2 +15v t45_r +15v t45_r 1 + c43 47u + c43 47u 1 2 r59(open) r59(open) |
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